Chalcogenide-based photovoltaic devices and methods of manufacturing the same

ABSTRACT

In one example embodiment, a method includes sputtering one or more absorber layers over a substrate. In a particular embodiment, the substrate is pre-heated to a substrate temperature of at least approximately 300 degrees Celsius prior to the sputtering and during the sputtering of each of one or more of the absorber layers, and the sputtering of at least one of the absorber layers is performed in a sputtering atmosphere having a pressure of at least 0.5 Pascals. Additionally, in a particular embodiment, the sputtering of at least one of the absorber layers comprises sputtering from a sputter target that comprises a chalcogenide alloy that comprises copper (Cu) and one or more of sulfur (S), selenium (Se), or tellurium (Te).

RELATED APPLICATIONS

This application is a divisional of U.S. patent application Ser. No.12/641,893, filed Dec. 18, 2009, which claims the benefit, under 35U.S.C. §119(e), of U.S. Provisional Patent Application No. 61/203,256,entitled SPUTTER PROCESS FOR FABRICATION CuIn BASED SOLAR CELLS, filed19 Dec. 2008, and hereby incorporated by reference herein.

TECHNICAL FIELD

The present disclosure generally relates to the manufacturing ofphotovoltaic devices, and more particularly, to the use of sputtering,and more particularly magnetron sputtering, in forming absorber and/orbuffer layers for photovoltaic devices.

BACKGROUND

P-n junction based photovoltaic cells are commonly used as solar cells.Generally, p-n junction based photovoltaic cells include a layer of ann-type semiconductor in direct contact with a layer of a p-typesemiconductor. By way of background, when a p-type semiconductor ispositioned in intimate contact with an n-type semiconductor a diffusionof electrons occurs from the region of high electron concentration (then-type side of the junction) into the region of low electronconcentration (the p-type side of the junction). However, the diffusionof charge carriers (electrons) does not happen indefinitely, as anopposing electric field is created by this charge imbalance. Theelectric field established across the p-n junction induces a separationof charge carriers that are created as result of photon absorption.

Chalcogenide (both single and mixed) semiconductors have optical bandgaps well within the terrestrial solar spectrum, and hence, can be usedas photon absorbers in thin film based photovoltaic cells, such as solarcells, to generate electron-hole pairs and convert light energy tousable electrical energy. More specifically, semiconducting chalcogenidefilms are typically used as the absorber layers in such devices. Achalcogenide is a chemical compound consisting of at least one chalcogenion (group 16 (VIA) elements in the periodic table, e.g., sulfur (S),selenium (Se), and tellurium (Te)) and at least one more electropositiveelement. As those of skill in the art will appreciate, references tochalcogenides are generally made in reference to sulfides, selenides,and tellurides. Thin film based solar cell devices may utilize thesechalcogenide semiconductor materials as the absorber layer(s) as is or,alternately, in the form of an alloy with other elements or evencompounds such as oxides, nitrides and carbides, among others. Physicalvapor deposition (PVD) based processes, and particularly sputter baseddeposition processes, have conventionally been utilized for high volumemanufacturing of such thin film layers with high throughput and yield.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A-1D illustrate diagrammatic cross-sectional side views ofexample solar cell configurations.

FIG. 2 illustrates an example sputtering chamber in which an examplesputtering process is performed.

FIG. 3 shows a table that includes example sets of parameters forsputtering absorber layers.

FIG. 4 illustrates an example conversion layer.

FIG. 5 illustrates an example absorber layer.

FIGS. 6A and 6B illustrate top and bottom portions, respectively, of atable showing example sputtering sources and parameters suitable for usein forming an absorber layer.

FIG. 7 illustrates a table showing example sputtering sources andparameters suitable for use in forming a buffer layer.

FIG. 8 illustrates an example interface region between an absorber layerand a buffer layer.

FIGS. 9A-9H show example absorber layer composition profiles.

FIGS. 10A-10H show example absorber layer composition profiles.

DESCRIPTION OF EXAMPLE EMBODIMENTS

Particular embodiments of the present disclosure relate to the use ofsputtering, and more particularly magnetron sputtering, in formingabsorber and/or buffer layers for photovoltaic devices (hereinafter alsoreferred to as “photovoltaic cells,” “solar cells,” or “solar devices”).In particular embodiments, magnetron sputtering is used in formingchalcogenide absorber or buffer layers. Particular embodimentscontemplate reducing the energies of the particles (atoms) ejected froma sputter target during the sputter (sputtering) process to improve theelectronic quality of the deposited absorber or buffer layers. Inparticular embodiments, energy reduction may be achieved during thesputtering process via one or more of: reducing the discharge voltage,increasing the pressure of the sputtering gas atmosphere, and increasingthe distance between the source and substrate during the sputteringprocess. Various particular embodiments may utilize both elemental andcompound sputter sources (targets). Particular embodiments may alsoutilize a reactive sputter process in the presence of at least one ofH₂S and H₂Se for depositing CIGS, and particularly CuIn—(S,Se,Te) (e.g.,CuIn(S,Se,Te)₂), based absorber layers (hereinafter, CuIn—Se, CuIn—S,CuIn—Te, or suitable combinations thereof may collectively be referredto as CuIn—(Se,S,Te) where appropriate). Hereinafter, reference to alayer may encompass a film, and vice versa, where appropriate.Additionally, reference to a layer may also encompass one or morelayers, where appropriate.

Copper indium gallium diselenide (e.g., Cu(In_(1-x)Ga_(x))Se₂, where xis less than or equal to approximately 0.7), copper indium galliumselenide sulfide (e.g., Cu(In_(1-x)Ga_(x))(Se_(1-y)S_(y))₂, where x isless than or equal to approximately 0.7 and y is less than or equal toapproximately 0.99), and copper indium gallium disulfide (e.g.,Cu(In_(1-x)Ga_(x))S₂, where x is less than or equal to approximately0.7), each of which is commonly referred to as a “CIGS” material, havebeen successfully used in the fabrication of thin film absorbers inphotovoltaic cells largely due to their relatively large absorptioncoefficients. In fact, photovoltaic cells having photovoltaicefficiencies greater or equal than approximately 20% have beenmanufactured using copper indium gallium diselenide absorber layers.Efforts to minimize the defect density in the absorber layer(s)(hereinafter referred to individually or collectively as “absorberlayer” or “absorber”) have enabled the manufacture of high quality CIGSthin film based photovoltaic cells.

FIGS. 1A-1D illustrate diagrammatic cross-sectional side views ofexample solar cell configurations. In particular, FIG. 1A illustrates anexample solar cell 100 that includes, in overlying sequence, atransparent glass substrate 102, a transparent conductive layer 104, aconversion layer 106, a transparent conductive layer 108, and aprotective transparent layer 110. In this example solar cell design,light can enter the solar cell 100 from the top (through the protectivetransparent layer 110) or from the bottom (through the transparentsubstrate 102). FIG. 1B illustrates another example solar cell 120 thatincludes, in overlying sequence, a non-transparent substrate (e.g., ametal, plastic, ceramic, or other suitable non-transparent substrate)122, a conductive layer 124, a conversion layer 126, a transparentconductive layer 128, and a protective transparent layer 130. In thisexample solar cell design, light can enter the solar cell 120 from thetop (through the protective transparent layer 130). FIG. 1C illustratesanother example solar cell 140 that includes, in overlying sequence, atransparent substrate (e.g., a glass, plastic, or other suitabletransparent substrate) 142, a conductive layer 144, a conversion layer146, a transparent conductive layer 148, and a protective transparentlayer 150. In this example solar cell design, light can enter the solarcell 140 from the top (through protective transparent layer 150). FIG.1D illustrates yet another example solar cell 160 that includes, inoverlying sequence, a transparent substrate (e.g., a glass, plastic, orother suitable transparent substrate) 162, a transparent conductivelayer 164, a conversion layer 166, a conductive layer 168, and aprotective layer 170. In this example solar cell design, light can enterthe solar cell 160 from the bottom (through the transparent substrate162).

In order to achieve charge separation (the separation of electron-holepairs) during operation of the resultant photovoltaic devices, each ofthe conversion layers 106, 126, 146, and 166 are comprised of at leastone n-type semiconductor material and at least one p-type semiconductormaterial. In particular embodiments, each of the conversion layers 106,126, 146, and 166 are comprised of at least one or more absorber layersand one or more buffer layers having opposite doping as the absorberlayers. By way of example, if the absorber layer is formed from a p-typesemiconductor, the buffer layer is formed from an n-type semiconductor.On the other hand, if the absorber layer is formed from an n-typesemiconductor, the buffer layer is formed from a p-type semiconductor.More particular embodiments of example conversion layers suitable foruse as one or more of conversion layers 106, 126, 146, or 166 will bedescribed later in the present disclosure.

In particular embodiments, each of the transparent conductive layers104, 108, 128, 148, or 164 is comprised of at least one oxide layer. Byway of example and not by way of limitation, the oxide layer forming thetransparent conductive layer may include one or more layers each formedof one or more of: titanium oxide (e.g., one or more of TiO, TiO₂,Ti₂O₃, or Ti₃O₅), aluminum oxide (e.g., Al₂O₃), cobalt oxide (e.g., oneor more of CoO, Co₂O₃, or Co₃O₄), silicon oxide (e.g., SiO₂), tin oxide(e.g., one or more of SnO or SnO₂), zinc oxide (e.g., ZnO), molybdenumoxide (e.g., one or more of Mo, MoO₂, or MoO₃), tantalum oxide (e.g.,one or more of TaO, TaO₂, or Ta₂O₅), tungsten oxide (e.g., one or moreof WO₂ or WO₃), indium oxide (e.g., one or more of InO or In₂O₃),magnesium oxide (e.g., MgO), bismuth oxide (e.g., Bi₂O₃), copper oxide(e.g., CuO), vanadium oxide (e.g., one or more of VO, VO₂, V₂O₃, V₂O₅,or V₃O₅), chromium oxide (e.g., one or more of CrO₂, CrO₃, Cr₂O₃, orCr₃O₄), zirconium oxide (e.g., ZrO₂), or yttrium oxide (e.g., Y₂O₃).Additionally, in various embodiments, the oxide layer may be doped withone or more of a variety of suitable elements or compounds. In oneparticular embodiment, each of the transparent conductive layers 104,108, 128, 148, or 164 may be comprised of ZnO doped with at least oneof: aluminum oxide, titanium oxide, zirconium oxide, vanadium oxide, ortin oxide. In another particular embodiment, each of the transparentconductive layers 104, 108, 128, 148, or 164 may be comprised of indiumoxide doped with at least one of: aluminum oxide, titanium oxide,zirconium oxide, vanadium oxide, or tin oxide. In another particularembodiment, each of the transparent conductive layers 104, 108, 128,148, or 164 may be a multi-layer structure comprised of at least a firstlayer formed from at least one of: zinc oxide, aluminum oxide, titaniumoxide, zirconium oxide, vanadium oxide, or tin oxide; and a second layercomprised of zinc oxide doped with at least one of: aluminum oxide,titanium oxide, zirconium oxide, vanadium oxide, or tin oxide. Inanother particular embodiment, each of the transparent conductive layers104, 108, 128, 148, or 164 may be a multi-layer structure comprised ofat least a first layer formed from at least one of: zinc oxide, aluminumoxide, titanium oxide, zirconium oxide, vanadium oxide, or tin oxide;and a second layer comprised of indium oxide doped with at least one of:aluminum oxide, titanium oxide, zirconium oxide, vanadium oxide, or tinoxide.

In particular embodiments, each of the conductive layers 124, 144, or168 is comprised of at least one metal layer. By way of example and notby way of limitation, each of conductive layers 124, 144, or 168 may beformed of one or more layers each individually or collectivelycontaining at least one of: aluminum (Al), titanium (Ti), vanadium (V),chromium (Cr), manganese (Mn), iron (Fe), cobalt (Co), nickel (Ni),copper (Cu), zirconium (Zr), niobium (Nb), molybdenum (Mo), ruthenium(Ru), rhodium (Rh), palladium (Pd), platinum (Pt), silver (Ag), hafnium(Hf), tantalum (Ta), tungsten (W), rhenium (Re), iridium (Ir), or gold(Au). In one particular embodiment, each of conductive layers 124, 144,or 168 may be formed of one or more layers each individually orcollectively containing at least one of: Al, Ti, V, Cr, Mn, Fe, Co, Ni,Cu, Zr, Nb, Mo, Ru, Rh, Pd, Pt, Ag, Hf, Ta, W, Re, Ir, or Au; and atleast one of: boron (B), carbon (C), nitrogen (N), lithium (Li), sodium(Na), silicon (Si), phosphorus (P), potassium (K), cesium (Cs), rubidium(Rb), sulfur (S), selenium (Se), tellurium (Te), mercury (Hg), lead(Pb), bismuth (Bi), tin (Sn), antimony (Sb), or germanium (Ge). Inanother particular embodiment, each of conductive layers 124, 144, or168 may be formed of a Mo-based layer that contains Mo and at least oneof: B, C, N, Na, Al, Si, P, S, K, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga,Ge, Se, Rb, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cs, Hf, Ta, W, Re, Ir, Pt, Au,Hg, Pb, or Bi. In another particular embodiment, each of conductivelayers 124, 144, or 168 may be formed of a multi-layer structurecomprised of an amorphous layer, a face-centered cubic (fcc) orhexagonal close-packed (hcp) interlayer, and a Mo-based layer. In suchan embodiment, the amorphous layer may be comprised of at least one of:CrTi, CoTa, CrTa, CoW, or glass; the fcc or hcp interlayer may becomprised of at least one of: Al, Ni, Cu, Ru, Rh, Pd, Ag, Ir, Pt, Au, orPb; and the Mo-based layer may be comprised of at least one of Mo and atleast one of: B, C, N, Na, Al, Si, P, S, K, Ti, V, Cr, Mn, Fe, Co, Ni,Cu, Zn, Ga, Ge, Se, Rb, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cs, Hf, Ta, W, Re,Ir, Pt, Au, Hg, Pb, or Bi.

In particular embodiments, magnetron sputtering may be used to depositeach of the conversion layers 106, 126, 146, or 166, each of thetransparent conductive layers 104, 108, 128, 148, or 164, as well aseach of the conductive layers 124, 144, or 168. Magnetron sputtering isan established technique used for the deposition of metallic layers in,for example, magnetic hard drives, microelectronics, and in thedeposition of intrinsic and conductive oxide layers in the semiconductorand solar cell industries. In magnetron sputtering, the sputteringsource (target) is a magnetron that utilizes strong electric andmagnetic fields to trap electrons close to the surface of the magnetron.These trapped electrons follow helical paths around the magnetic fieldlines undergoing more ionizing collisions with gaseous neutrals near thetarget surface than would otherwise occur. As a result, the plasma maybe sustained at a lower sputtering atmosphere pressure. Additionally,higher deposition rates may also be achieved.

While conventional magnetron sputtering techniques have enabled highdeposition rates and accurate control of the thickness and compositionof certain deposited films over a large area, magnetron sputtering hasrarely been used for depositing absorber and buffer semiconductor layersused in solar cells. By way of background, during a conventionalsputtering process, high energy particles including positive ions,negative ions, and neutrals may be created in the plasma. Theseparticles may strike the substrate producing defects in the depositedfilm structure. These defects act as recombination centers forelectron-hole pairs that are created by incident light photons. Suchrecombination centers lower the light conversation efficiency of theabsorbers in photovoltaic cells diminishing the output of the cells.

FIG. 2 illustrates an example sputtering chamber 200 in which an examplesputtering process is performed. In particular embodiments, thesputtering chamber 200 may be used for magnetron sputtering. In theillustrated example, argon (Ar) (positive) ions 202 a strike the source(sputtering target, magnetron) 204 resulting in the ejection of targetatoms 206 and electrons. The target atoms are then deposited as a thinfilm on substrate 208. Ejected electrons stay trapped close to thesurface of the magnetron due to the presence of the magnetic field. Thekinetic energy, E_(k)(atoms), and angle, α, at which the ejected targetatoms 206 land on the substrate 208 (or on the thin film formed on thesubstrate by the target atoms 206 or previously deposited atoms) dependat least in part on the pressure, p_(Ar), of the sputtering atmosphere(e.g., the pressure of the Ar) in sputtering chamber 200. Moreparticularly, if p_(Ar) is high, the subsequently ejected target atoms206 undergo a greater number of collisions with positive Ar ions 202 aand so called “Ar neutrals” (having neutral electromagnetic charge) 202b as the ejected target atoms 206 travel from source 204 to substrate208 resulting in a reduction of the kinetic energy E_(k) (atoms) of thetarget atoms 206 and an increase of the incidence angle α of the ejectedtarget atoms 206. Ar ions 202 a that strike the source 204 receive anelectron from the source and are reflected off the source as Ar neutrals202 b. If these Ar neutrals 202 b strike the substrate 208 (or moreparticularly the thin film formed on the substrate by the target atoms206 or previously deposited atoms) they increase the mobility of theatoms 206 (or other atoms) that are already deposited on the substrate208. These Ar neutrals 202 b can also induce structural defects(especially in the bulk of the thin film) reducing the electricalquality of the film. A high sputter pressure also increases theprobability of collisions between Ar neutrals 202 b and the rest of theAr atoms in the chamber 200 reducing the kinetic energy, E_(k)(Ar), ofAr neutrals 202 b and hence minimizing the defect density produced by Arneutrals 202 b in the deposited film.

Indeed, while increasing the mobility of the target atoms 206 located atthe surface of the thin film deposited on the substrate 208 may bebeneficial as this facilitates these surface atoms 206 finding theirrespective minimum energy positions and forming the desired crystalstructure, the energy of the Ar neutrals 202 b may be difficult tocontrol and may have adverse consequences. More particularly, highenergy neutrals 202 b may also penetrate into the bulk of the depositedthin film knocking deposited atoms 206 from their equilibrium positions.As bulk diffusion of atoms is much slower than surface diffusion, theseperturbed atoms 206 have a lower probability of diffusing back to theiroriginal equilibrium positions, and hence, defects may be formed in thedeposited film.

In particular embodiments, the energies of the ejected target atoms 206that strike the substrate 208 are intentionally reduced to obtainabsorber or buffer layers with high electronic quality; that is, forexample, having a high photovoltaic efficiency for absorbing sunlightand converting this solar irradiance into electrical free energy. Insome particular described embodiments, reference to a sputteringatmosphere is made with reference to a sputtering atmosphere of Ar atomsfor simplification. However, it should be appreciated that a widevariety of other sputtering gases may be additionally or alternatelyused in other embodiments including, by way of example and not by way oflimitation, one or more of: helium (He), krypton (Kr), xenon (Xe),oxygen (e.g., in the form of dioxygen (O₂)), nitrogen (e.g., in the formof dinitrogen (N₂)), hydrogen (H), hydrogen sulfide (H₂S), hydrogenselenide (H₂Se), phosphorus trihydride (PH₃), ammonia (NH₃), andphosphorus pentoxide (P₂O₅), among others. As such, in the describedembodiments, reference to the pressure of the sputtering atmosphere maybe made with reference to the total sputtering pressure in the chamber,p_(tot), rather than Ar sputtering pressure, p_(Ar).

In particular embodiments, absorber and buffer layers suitable for usein, for example, each of the conversion layers 106, 126, 146, or 166,are sputtered with magnetron sputtering in the presence of one or moregases such as, by way of example and not by way of limitation, one ormore inert gases (e.g., Ar, Kr, or Xe) and/or one or more reactive gases(e.g., O₂, N₂, H₂S, H₂Se, PH₃, NH₃, P₂O₅) at the same time or atdifferent times. Generally, the electronic quality of the sputteredlayers, and particularly the absorber and buffer layers, depends on: thedischarge voltage; the total gas pressure in the chamber, p_(tot); theamount of reactive gas in the sputtering chamber; the deposition rate(the deposition rate may be defined as the number of atoms that land onthe substrate per second or the increase in the thickness of thedeposited layer per second), DR; the distance from the source to thesubstrate, d; the applied bias voltage on the substrate, V_(bias); andthe substrate temperature, T_(sub).

As described above, to obtain absorber and buffer layers with highelectronic quality, the energies of the ejected target atoms 206 thatstrike the substrate are reduced. As illustrated in FIG. 2, thedischarge voltage accelerates positive Ar ions 202 a toward the source204. Ar ions 202 a that strike the source 204 may cause atoms 206 to beejected from the source 204. Atoms 206 ejected from the source 204 maythen deposit on substrate 208. When the discharge voltage is large, theenergies of the positive Ar ions 202 a is larger resulting in largerkinetic energy (E_(k)(Ar)) of Ar neutrals 202 b and kinetic energy(E_(k)(atoms)) of ejected target atoms 206. In particular embodiments,the kinetic energy (E_(k)(atoms)) of the atoms 206 that strike thesubstrate 208 is reduced by reducing the discharge voltage. Inparticular embodiments, a lower discharge voltage may be achieved byexciting the plasma during the sputtering process with radio frequency(RF) or current pulse power supplies. Additionally, as sputtering in thepresence of a reactive gas can increase the discharge voltage, inparticularly embodiments, the discharge voltage is further reduced bysputtering in a sputtering atmosphere that includes a combination ofreactive and inert gases.

The present inventors have also determined that absorber and bufferlayers with high electronic quality can be obtained with a DC powersupply if the total sputtering pressure, p_(tot), is sufficiently large.In general, a higher total pressure, p_(tot), in the sputtering chamber200 increases the probability of collision between atoms, andparticularly between: 1) ejected target atoms 206, and 2) Ar neutrals202 b and Ar ions 202 a in the chamber 200. The increase in collisionprobability reduces the energy of the ejected target atoms 206 andreflected Ar neutrals 202 b that strike the substrate 208 (or the thinfilm formed on the substrate by target atoms 206, previously depositedatoms, or reactive gas atoms). The amount of reactive gas in thesputtering chamber 200 (where the amount of reactive gas represents thenumber of molecules of reactive gas in the chamber) also affects theenergies of the ejected target atoms 206 as the amount of reactive gasin the chamber 200 determines, at least in part, the probability ofreaction between the ejected target atoms 206 and the atoms of thereactive gas. Thus, in particular embodiments, the amount of reactivegas is increased (therefore increasing p_(tot)) resulting in a reductionof the energies of the ejected target atoms 206.

In particular embodiments, the deposition rate (DR) of the ejectedtarget atoms 206 is increased as the total sputtering pressure, p_(tot),increases to maintain the same surface mobility of atoms 206 depositedon the substrate 208. Additionally, the amount of reactive gas in thesputtering chamber 200 must also increase (if applicable) to maintainthe same composition in the sputtered films (layers).

In particular embodiments, the source-to-substrate distance, d, isincreased to increase the probability of collisions between ejectedtarget atoms 206 and Ar neutrals 202 b with Ar ions 202 a. Therefore,increasing the source-to-substrate distance, d, reduces the totalsputter pressure, p_(tot), required to maintain the electronic qualityof the deposited layer.

In particular embodiments, the bias voltage, V_(bias), may be adjustedto vary the mobility of the target atoms 206 deposited on the substrate208. In particular embodiments, the bias voltage, V_(bias), is anegative voltage applied to the substrate 208 with respect to, forexample, the walls of the sputtering chamber 200. The bias voltageincreases the mobility of the deposited atoms 206 on the substratesurface 210. A high mobility of atoms 206 in the deposited film isdesired for obtaining absorber and buffer layers having high electronicqualities. The role of the bias voltage is to accelerates positive ionstoward the substrate 208. These positive ions strike the deposited thinfilm increasing the defect density in the deposited film.

In particular embodiments, the deposited layers may also be heated, suchas by heating the substrate 208, to increase the mobility of thedeposited atoms 206. Increasing the substrate temperature, T_(sub),increases mobility and can improve crystal structure and increase grainsize in the deposited film. This can reduce defect densities and improvethe electronic qualities of absorber and buffer layers. The substratetemperature, T_(sub), is also an important parameter in the formation ofa desired chalcopyrite structure in CuIn-based solar cells.

In general, the total sputtering gas pressure, p_(tot), in the chambershould be greater than approximately 0.4 Pascals (Pa) (˜3 mTorr) and thesubstrate temperature, T_(sub), should be higher than approximately 300degrees Celsius. However, in particular embodiments, if thesource-to-substrate distance, d, is less than 3 cm, then the total gaspressure, p_(tot), in the chamber is increased to at least 0.25 Pa (˜2mTorr), and the substrate temperature, T_(sub), is increased to at least300 C. Additionally, in particular embodiments, if the deposition rate,DR, is greater than 5 nm/s, then the total gas pressure, p_(tot), in thechamber is at least 0.25 Pa (˜2 mTorr), and the substrate temperature,T_(sub), is increased to at least 300 degrees Celsius. However, in evenmore preferred embodiments, it is even more desirable to use theparameters outlined in FIG. 3, which shows a table that includes examplesets of parameters for sputtering absorber layers at elevatedtemperatures (e.g., above 300 degrees Celsius). More particularly, eachrow of the table of FIG. 3 corresponds to a set of parameters for useduring sputtering of an absorber layer. In particular embodiments, as isthe case for each set of parameters of FIG. 3, the total sputtering gaspressure, p_(tot), in the chamber is greater than approximately 0.5Pascals (Pa) (˜4 mTorr) and the substrate temperature, T_(sub), ishigher than approximately 300 degrees Celsius. In particularembodiments, if the source-to-substrate distance, d, is less than 3 cm,then the total gas pressure, p_(tot), in the chamber is increased to atleast 0.9 Pa (7 mTorr), and the substrate temperature, T_(sub), isincreased to at least 300 C. In particular embodiments, if thedeposition rate, DR, is greater than 5 nm/s, then the total gaspressure, p_(tot), in the chamber is at least 0.7 Pa (5 mTorr), and thesubstrate temperature, T_(sub), is increased to at least 300 degreesCelsius. In particular embodiments, if the source-to-substrate distance,d, is less than approximately 3 cm, and if the deposition rate, DR, isgreater than approximately 5 nm/s, then the total gas pressure, p_(tot),in the chamber increased to at least 1.3 Pa (10 mTorr) and the substratetemperature, T_(sub), is increased to at least 300 degrees Celsius.Additionally, in particular embodiments, if the source-to-substratedistance, d, is less than approximately 3 cm, and if the depositionrate, DR, is greater than approximately 5 nm/s, and if the applied biasvoltage, V_(bias), on the substrate is less than approximately −300Volts (the “−” minus indicates that the bias is negative with respect tothe sputtering chamber walls, hence, “less than approximately −300Volts” refers to a negative bias voltage having a magnitude larger than300 (e.g., −350 Volts)), then the total gas pressure, p_(tot), in thechamber is greater than 2 Pa (16 mTorr) and the substrate temperature,T_(sub), is higher than 300 degrees Celsius.

In particular embodiments, similar parameters may be used for sputteringthe buffer layers. However, when sputtering buffer layers, the substratetemperature, T_(sub), may be lower than for sputtering the absorberlayers, and is chosen to ensure that no undesired diffusion/intermixingoccurs.

As described above, each of the conversion layers 106, 126, 146, and 166are comprised of at least one or more absorber layers and one or morebuffer layers of opposite doping. FIG. 4 illustrates an exampleconversion layer 400 that is comprised of an overlying sequence of nadjacent absorber layers (where n is the number of adjacent absorberlayers and where n is greater than or equal to 1) 402 l to 402 n(collectively forming absorber layer 402), adjacent to m adjacent bufferlayers (where m is the number of adjacent buffer layers and where m isgreater than or equal to 1) 404 l to 404 m (collectively forming bufferlayer 404). In particular embodiments, at least one of the absorberlayers 402 l to 402 n is sputtered in the presence of a sputteringatmosphere that includes at least one of H₂S and H₂Se. Although FIG. 4illustrates the buffer layers 404 as being formed over the absorberlayers 402 (relative to the substrate), it alternate embodiments, theabsorber layers 402 may be positioned over the buffer layers 404.

In particular embodiments, each of the absorber layers 402 l to 402 nare deposited using magnetron sputtering. Additionally, in particularembodiments, at least one of the absorber layers 402 l to 402 n isdeposited on a substrate (e.g., substrate 208 generally, and moreparticularly, one of substrates 102, 122, 142, or 162) that has beenpreviously heated to a substrate temperature, T_(sub), greater thanapproximately 300 degrees Celsius. In particular embodiments, to obtainthe desired crystal structure, CuIn-containing absorber layers 402 areheated (via heating the substrate) to a temperature above 300 degreesCelsius. In one particular embodiment, CuIn-containing absorber layers402 are formed by sputtering (via magnetron sputtering) CuIn-containinglayers at temperatures below 300 degrees Celsius followed bypost-sputter annealing of these layers at temperatures above 300 degreesCelsius. In such an embodiment, the composition profile across theabsorber layers 402 is difficult to control as the composition profileacross the absorber layers may change after annealing. However, byannealing the absorber layers 402 in very short time scales compositionprofile changes across the absorber layers may be inhibited orprevented. In another particular embodiment, the absorber layers 402 aresputtered (e.g., with magnetron sputtering) on a substrate (e.g.,substrate 102, 122, 142, or 162) that has been previously heated totemperatures above 300 degrees Celsius. In this embodiment, the desiredcrystal structure may be produced during the sputtering of the absorberlayers 402. This embodiment also enables much more precise control ofthe composition profile across the absorber layers 402. Controlling thecomposition profile across the absorber layers 402 is important formaximizing the efficiency of the conversion of solar irradiance intoelectrical free energy.

In particular embodiments, CuIn(S,Se)₂ absorber layers 402 may be formedby sputtering (e.g., magnetron sputtering) compound source materials attemperatures above 300 degrees Celsius. By way of example, a CuIn(S,Se)₂absorber layer may be formed using a target source that comprisesCuIn(S,Se)₂. As another example, In₂(S,Se)₃ and Cu(S,Se) absorber layers402 may be formed using target sources that comprise In₂(S,Se)₃ andCu(S,Se). In such embodiments, the S and/or Se quantities necessary forthe formation of chalcogenides are supplied directly from the sputtertarget sources. However, both S and Se can easily evaporate during thesputtering process resulting in S and Se deficient CuIn(S,Se)₂ absorberlayers that have less than desired conversation efficiency. Inparticular embodiments, to mitigate this problem, at least one of theabsorber layers 402 l to 402 n is sputtered (e.g., using one of theaforementioned targets) in a sputtering atmosphere that includes atleast one reactive gas, and particularly, H₂S or H₂Se. These gasesprovide a virtually unlimited supply of S and Se and hence, maintain thetotal S and Se content in the deposited layers above, for example, 48atomic percent and improving the light conversion efficiency of suchCuIn(S,Se)₂ absorber layers.

In alternate embodiments, solar cells with a high quality CuInS₂absorber layer can be obtained by sputtering elemental target sources(e.g., Cu or In) in the presence of a sputtering atmosphere of H₂S orH₂Se. However, in particular embodiments, at least one compound sourceis used for forming absorber or buffer layers of CuIn-based solar cells.As such, in particular embodiments, target sources used in depositingCuIn-based absorber layers 302 may contain Cu and In and at least atleast one of: B, C, N, Na, Al, Si, P, S, K, Ti, V, Cr, Mn, Fe, Co, Ni,Cu, Zn, Ga, Ge, Se, Rb, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cs, Hf, Ta, W, Re,Ir, Pt, Au, Hg, Pb, Bi, and Cd.

FIG. 5 illustrates, more particularly, an absorber layer 402 that iscomprised of an overlying sequence of i absorber layers 506 (where i isthe number of absorber layers of type 506 and where i is greater than orequal to 1 and less than or equal to 100) 506 l to 506 i, j absorberlayers 508 (where j is the number of absorber layers of type 508 andwhere j is greater than or equal to 0 and less than or equal to 100) 508l to 508 j, and k absorber layers 510 (where k is the number of absorberlayers of type 510 and where k is greater than or equal to 0 and lessthan or equal to 100) 510 l to 510 k. Thus, the total number of absorberlayers in this embodiment is n, where n=i+j+k. In one particularembodiment, each of the absorber layers 506 l to 506 i, 508 l to 508 j,and 510 l to 510 k is sputter deposited from the respective sputtersource materials shown in Table 2 illustrated in FIGS. 6A and 6B, whichillustrate top and bottom portions, respectively, of this table. Inparticular embodiments, at least one of these layers is sputtered at atemperature above 300 degrees Celsius. As described above, one or moreof these layers may also be sputtered in the presence of one or both ofH₂S and H₂Se to avoid S and Se deficiency in the resultant absorberfilms.

In another embodiment, each of the absorber layers 506 l to 506 i, 508 lto 508 j, and 510 l to 510 k is sputter deposited from the respectivesputter source materials shown in Table 2 illustrated in FIGS. 6A and 6Bat temperatures below 300 degrees Celsius. Subsequently these absorberlayers are annealed at temperatures above 350 degrees Celsius. However,in even more preferred embodiments, the annealing is performed attemperatures above 500 degrees Celsius. As described above, one or moreof these layers may also be sputtered and annealed in the presence ofone or both of H₂S and H₂Se to avoid S and Se deficiency in theresultant absorber films.

FIG. 7 illustrates Table 3, which shows example sputter source materialsand parameters suitable for use in forming buffer layers 404 l to 404 m.Buffer layers 404 l to 404 m may be formed using sputtering, andparticularly magnetron sputtering, as described above, or, alternately,using chemical bath deposition, chemical vapor deposition, atomic layerdeposition, or another suitable process. In particular embodiments, oneor more of buffer layers 404 l to 404 m individually or collectivelycontain at least one of: Al, Zn, Ga, Cd, In, or Sn and at least one of:S, Se, or Te. By way of example, one or more of buffer layers 404 l to404 m may be a Si or Ge layer doped with at least one of: N, P, As, Sn,B, Al, Ga, or In.

In particular embodiments, to obtain high efficiency solar cells, the Cucontent in the absorber layer 402 in the region 820 (illustrated in FIG.8) proximal to the interface 822 between the absorber layer 402 andbuffer layer 404 is less than approximately 30 atomic percent (at. %).In particular embodiments, the thickness of interface region 820 is inthe range of approximately 100 Å (Angstroms) to 0.5 μm (microns).

FIGS. 9A-9H show example composition profiles for absorber layers inaccordance with particular embodiments obtained using sputter depositionwhere at least one of the layers is heated above 300 degrees Celsiusduring its deposition. More particularly, FIG. 9A illustrates acomposition profile of an absorber layer 402 where the vertical axisrepresents the atomic percent of Cu. The horizontal axis indicates thethickness of particular regions (regions 820, 824, and 826 from FIG. 8)of the absorber layer 402 for which the atomic percent composition isspecified. Absorber layer region 820 is the region of the absorber 402closest to the buffer layer 404, absorber layer region 824 is a middleregion of the absorber, and absorber layer region 826 is the region ofthe absorber closer to the back contact. More particularly, region 820,the interface region, refers to the region that neighbors interface 822and, in particular embodiments, has a thickness in the range ofapproximately 100 Å (Angstroms) to 0.5 μm. Region 824 borders region 820and, in particular embodiments, has a thickness in the range ofapproximately 0 Å to 5 μm. Region 826 borders region 824 and, inparticular embodiments, has a thickness in the range of approximately100 Å to 5 μm. FIG. 9B illustrates a composition profile of an absorberlayer 402 where the vertical axis represents the atomic percent of Gawith respect to particular regions of the absorber layer 402. FIG. 9Cillustrate a composition profile of an absorber layer 402 where thevertical axis represents the atomic percent of In with respect toparticular regions of the absorber layer 402. FIG. 9D illustrates acomposition profile of an absorber layer 402 where the vertical axisrepresents the atomic percent of Al with respect to particular regionsof the absorber layer 402. FIG. 9E illustrates a composition profile ofan absorber layer 402 where the vertical axis represents the atomicpercent of the combined total of S, Se, and Te with respect toparticular regions of the absorber layer 402. FIG. 9F illustrates acomposition profile of an absorber layer 402 where the vertical axisrepresents the atomic percent of the combined total of Zn, Cd, Hg, Sn,Si, Ge, and Pb with respect to particular regions of the absorber layer402. FIG. 9G illustrates a composition profile of an absorber layer 402where the vertical axis represents the atomic percent of the combinedtotal of Ag and Au with respect to particular regions of the absorberlayer 402. Lastly, FIG. 9H illustrates a composition profile of anabsorber layer 402 where the vertical axis represents the atomic percentof the combined total of Li, Na, K, Rb, and Cs with respect toparticular regions of the absorber layer 402.

FIGS. 10A-10H show more preferable examples of absorber layercomposition profiles in accordance with more particular embodimentsobtained using sputter deposition where at least one of the layers isheated above 300 degrees Celsius during the deposition. Moreparticularly, FIG. 10A illustrates a composition profile of an absorberlayer 402 where the vertical axis represents the atomic percent of Cu.The horizontal axis again indicates the thickness of particular regions(regions 820, 824, and 826 from FIG. 8) of the absorber layer 402 forwhich the atomic percent composition is specified. FIG. 10B illustratesa composition profile of an absorber layer 402 where the vertical axisrepresents the atomic percent of Ga with respect to particular regionsof the absorber layer 402. FIG. 10C illustrate a composition profile ofan absorber layer 402 where the vertical axis represents the atomicpercent of In with respect to particular regions of the absorber layer402. FIG. 10D illustrates a composition profile of an absorber layer 402where the vertical axis represents the atomic percent of Al with respectto particular regions of the absorber layer 402. FIG. 10E illustrates acomposition profile of an absorber layer 402 where the vertical axisrepresents the atomic percent of the combined total of S, Se, and Tewith respect to particular regions of the absorber layer 402. FIG. 10Fillustrates a composition profile of an absorber layer 402 where thevertical axis represents the atomic percent of the combined total of Zn,Cd, Hg, Sn, Si, Ge, and Pb with respect to particular regions of theabsorber layer 402. FIG. 10G illustrates a composition profile of anabsorber layer 402 where the vertical axis represents the atomic percentof the combined total of Ag and Au with respect to particular regions ofthe absorber layer 402. Lastly, FIG. 10H illustrates a compositionprofile of an absorber layer 402 where the vertical axis represents theatomic percent of the combined total of Li, Na, K, Rb, and Cs withrespect to particular regions of the absorber layer 402.

In particular embodiments, the afore-described methods are used tofabricate CIGS-based solar cells that are comprised of an overlayingsequence of (beginning with the layer closest to the substrate) a Moconductive layer, a Cu(In,Ga)Se₂ absorber layer, a CdS buffer layer, aZnO conductive layer, and a ZnO conductive layer doped with Al₂O₃. Inparticular embodiments, to maximize the efficiency of this multi-layerstructure cell, the Ga content across the Cu(In,Ga)Se₂ absorber isintentionally non-uniform, that is, the Ga content at the Mo and CdSinterfaces is greater than in the middle of the Cu(In,Ga)Se₂ absorberlayer. This composition profile is very difficult to obtain using apost-sputter annealing process. For example, the Cu(In,Ga)Se₂ absorberlayer can be obtained by annealing a multilayer-structure comprised of aCuGa layer, a In layer, and a Se layer that are sputter deposited on topof the Mo layer. In such an embodiment, the Ga content is greatest atthe interface between the Mo and Cu(In,Ga)Se₂ layers and monotonicallydecreases toward the Cu(In,Ga)Se₂ interface with the buffer layer, whichis not desirable for absorbers used in high efficiency solar cells.Thus, in particular embodiments, to obtain an optimal compositionprofile across the absorber layer, at least one of the absorber layers402 l to 402 n is deposited by sputtering at a temperature above 300degrees Celsius. The desired Ga composition profile can be also obtainedby fast annealing process. In this case Ga and In do not have time todiffuse across the absorber leading to decrease of Ga concentration atthe interface with buffer layer.

The present disclosure encompasses all changes, substitutions,variations, alterations, and modifications to the example embodimentsherein that a person having ordinary skill in the art would comprehend.Similarly, where appropriate, the appended claims encompass all changes,substitutions, variations, alterations, and modifications to the exampleembodiments herein that a person having ordinary skill in the art wouldcomprehend.

1. A method comprising: sputtering one or more absorber layers over asubstrate, wherein: the substrate is pre-heated to a substratetemperature of at least approximately 300 degrees Celsius prior to thesputtering and during the sputtering of each of one or more of theabsorber layers; the sputtering of at least one of the absorber layersis performed in a sputtering atmosphere having a pressure of at least0.5 Pascals; and the sputtering of at least one of the absorber layerscomprises sputtering from a sputter target that comprises a chalcogenidealloy that comprises copper (Cu) and one or more of sulfur (S), selenium(Se), or tellurium (Te).
 2. The method of claim 1, wherein thesputtering comprises magnetron sputtering.
 3. The method of claim 1,wherein the sputtering of at least one of the absorber layers comprisessputtering in the presence of a reactive gas that comprises one or moreof H₂S or H₂Se.
 4. The method of claim 1, wherein the at least onechalcogenide further comprises one or more of gallium (Ga), zinc (Zn),aluminum (AI), and cadmium (Cd).
 5. The method of claim 1, wherein thedistance between the substrate and sputter target for sputtering atleast one of the absorber layers is less than 8 cm.
 6. The method ofclaim 1, wherein the sputtering of at least one of the absorber layerscomprises sputtering at a bias voltage less than approximately −150Volts.
 7. The method of claim 1, wherein the sputtering of at least oneof the absorber layers comprises exciting the plasma during thesputtering with radio frequency (RF) or current pulse power supplies. 8.A method comprising: sputtering one or more absorber layers over anon-heated substrate, wherein the sputtering of at least one of theabsorber layers comprises sputtering from a sputter target thatcomprises a chalcogenide alloy that comprises copper (Cu) and one ormore of sulfur (S), selenium (Se), or tellurium (Te); and annealing thesputtered absorber layers at an annealing temperature that exceeds 350degrees Celsius.